[2027 Internship] Standard Cell Library Design Engineer Intern

Job Description [What you will do] Responsible for Standard Cell Library Characterization for leading edge process node (7nm/5nm/4nm/3nm), as the pioneer to setup design platform for MediaTek projects. Perform timing/ power/ constraint/ noise/ variation modeling, analysis and flow development for >15K logic circuit for one process node. Testchip design and Si data analysis flow development for advanced technology node (<7nm), including big data processing and visualization. Main Requirements and Qualifications [What you will bring] Engineering/Computer Engineering/Computer Science, no prior experience is required. Basic knowledge of IC design and circuit design. Basic knowledge of UNIX/LINUX environment and any programming language, e.g. Python, Perl, Tcl, C/C++. Familiar with foundation IP (Std-cell, Memory, I/O) design and/or CAD is a plus. Knowledge of spice simulation, data analysis, machine learning is a plus.